Camera configuration register
CAM_REC_DATA_BYTELEN | Camera receive data byte length minus 1 to set DMA in_suc_eof_int. |
CAM_LINE_INT_NUM | The line number minus 1 to generate cam_hs_int. |
CAM_CLK_INV | 1: Invert the input signal CAM_PCLK. 0: Not invert. |
CAM_VSYNC_FILTER_EN | 1: Enable CAM_VSYNC filter function. 0: bypass. |
CAM_2BYTE_EN | 1: The bit number of input data is 9~16. 0: The bit number of input data is 0~8. |
CAM_DE_INV | CAM_DE invert enable signal, valid in high level. |
CAM_HSYNC_INV | CAM_HSYNC invert enable signal, valid in high level. |
CAM_VSYNC_INV | CAM_VSYNC invert enable signal, valid in high level. |
CAM_VH_DE_MODE_EN | 1: Input control signals are CAM_DE CAM_HSYNC and CAM_VSYNC is 1. 0: Input control signals are CAM_DE and CAM_VSYNC. CAM_HSYNC and CAM_DE are all 1 the the same time. |
CAM_START | Camera module start signal. |
CAM_RESET | Camera module reset signal. |
CAM_AFIFO_RESET | Camera AFIFO reset signal. |